- Lab 5: GDT, IDT, PIC & PIT
PIT and PIC are chips with their own registers
How does CPU read from and write to peripheral chips' registers: memory-mapped and port-mapped: IN and OUT instructions
PIT and PIC are port-mapped. Find out PIT's port:
Find out PIC's port:
Now we can write values to their registers to configure them.
What do we want them to do?
PIT: Generate timer interrupt once every 10 ms.
PIC: Route timer interrupt to interrupt #32
Configure PIT: select
Periodic interrupt to PIC: Channel 0 and Mode 2
Mode 2: reload value and counter
What is the reload value for 10 ms
Configure PIC: use mater PIC and remap IRQ0 to 32. Why?
Very last thing: send end of interrupt to acknowledge
Tasks for today:
- Create a working timer interrupt
- CPU wants to do something after 5 seconds. How is CPU able to be aware of time?
- PIT -- a chip, counting down to 0, interrupt CPU
- How is CPU able to be receive interrupts?
- CPU handles different interrupts in different ways: interrupt number and interrupt description table (IDT)
- We don't need to worry about interrupt # and how to jump to the IDT. Just set up the IDT!
- How to set up IDT: create the table, tell CPU where it is using lidt
- The format of the table is conceptually simple: interrupt # -- address of the handler code
- Each entry of IDT is a 8 byte gate (think of it like a C struct)
- offset_1 and offset_2 contains the address of the handler code
- uint16_t selector. The selector: a real pain!
- So we've got to set up GDT first
- Like IDT, GDT entry is 8 byte. It decides the accessible memory range.
- GDT is too complex! Just use the very basic feature of it!
- In summary: PIT depends on PIC. PIC depends on IDT. IDT depends on GDT
- Start writing the code:
- Setting up the GDT first: at least three entries: one empty, one for code, one for data
- GDT Tutorial
- code: 0x0000FFFF, 0x00CF9A00; data: 0x0000FFFF, 0x00CF9200
- tell CPU where GDT is: length of GDT - 1 and the address of the GDT
- reload all the segment registers to point to the GDT entry
- Neither POP nor MOV can place a value in the code-segment register CS; only the far control-transfer instructions can change CS.
- set up IDT: define the timer interrupt handler, use the handler address to fill in the IDT, load the IDT (just like how we load the GDT)
- Why choose interrrupt 32 for timer?
- PIC Tutorial
Author: Zhuoqun (Tom) Cheng.